Copyright 2006-2016 Standard Performance Evaluation Corporation
Supermicro
SuperServer 6028R-TR
(X10DRi , Intel Xeon E5-2650 v4)
SPECint®_rate2006 = 1050
SPECint_rate_base2006 = 1000
CPU2006 license: | 001176 | Test date: | Apr-2016 |
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Test sponsor: | Supermicro | Hardware Availability: | Mar-2016 |
Tested by: | Supermicro | Software Availability: | Sep-2015 |
Hardware | |
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CPU Name: | Intel Xeon E5-2650 v4 |
CPU Characteristics: | Intel Turbo Boost Technology up to 2.90 GHz |
CPU MHz: | 2200 |
FPU: | Integrated |
CPU(s) enabled: | 24 cores, 2 chips, 12 cores/chip, 2 threads/core |
CPU(s) orderable: | 1,2 chips |
Primary Cache: | 32 KB I + 32 KB D on chip per core |
Secondary Cache: | 256 KB I+D on chip per core |
L3 Cache: | 30 MB I+D on chip per chip |
Other Cache: | None |
Memory: | 256 GB (16 x 16 GB 2Rx4 PC4-2400T-R) |
Disk Subsystem: | 1 x 300 GB SATA III , 10000 RPM |
Other Hardware: | None |
Software | |
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Operating System: | Kernel 3.12.49-11-default |
Compiler: | C/C++: Version 16.0.0.101 of Intel C++ Studio XE for Linux |
Auto Parallel: | No |
File System: | xfs |
System State: | Run level 5 |
Base Pointers: | 32-bit |
Peak Pointers: | 32/64-bit |
Other Software: | Microquill SmartHeap V10.2 |
Benchmark | Base | Peak | ||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Copies | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | Copies | Seconds | Ratio | Seconds | Ratio | Seconds | Ratio | |
Results appear in the order in which they were run. Bold underlined text indicates a median measurement. | ||||||||||||||
400.perlbench | 48 | 661 | 710 | 661 | 709 | 659 | 711 | 48 | 534 | 879 | 533 | 879 | 534 | 878 |
401.bzip2 | 48 | 964 | 481 | 966 | 480 | 966 | 480 | 48 | 935 | 496 | 933 | 496 | 934 | 496 |
403.gcc | 48 | 510 | 758 | 508 | 760 | 511 | 757 | 48 | 510 | 757 | 508 | 760 | 507 | 762 |
429.mcf | 48 | 312 | 1400 | 314 | 1390 | 314 | 1390 | 48 | 312 | 1400 | 314 | 1390 | 314 | 1390 |
445.gobmk | 48 | 783 | 643 | 783 | 643 | 783 | 643 | 48 | 769 | 655 | 770 | 654 | 770 | 654 |
456.hmmer | 48 | 311 | 1440 | 311 | 1440 | 310 | 1450 | 48 | 267 | 1680 | 266 | 1680 | 266 | 1680 |
458.sjeng | 48 | 870 | 667 | 870 | 668 | 870 | 668 | 48 | 823 | 706 | 823 | 706 | 823 | 706 |
462.libquantum | 48 | 101 | 9860 | 101 | 9870 | 101 | 9870 | 48 | 101 | 9860 | 101 | 9870 | 101 | 9870 |
464.h264ref | 48 | 882 | 1200 | 896 | 1190 | 889 | 1190 | 48 | 867 | 1230 | 867 | 1230 | 868 | 1220 |
471.omnetpp | 48 | 551 | 545 | 550 | 545 | 551 | 544 | 48 | 518 | 579 | 518 | 580 | 516 | 581 |
473.astar | 48 | 577 | 584 | 577 | 584 | 578 | 583 | 48 | 577 | 584 | 577 | 584 | 578 | 583 |
483.xalancbmk | 48 | 275 | 1200 | 274 | 1210 | 274 | 1210 | 48 | 275 | 1200 | 274 | 1210 | 274 | 1210 |
The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file.
Stack size set to unlimited using "ulimit -s unlimited"
BIOS Settings: COD Enable = Enable Early Snoop = Disable Home Dir Snoop with IVT- Style OSB = Disable Enforce POR = Disabled Sysinfo program /home/SPEC2K6/SPEC2006-V12/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on 113-172 Tue Apr 19 19:21:43 2016 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2650 v4@ 2.20GHz 2 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 13 cache size : 15360 KB From /proc/meminfo MemTotal: 264362216 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d SUSE Linux Enterprise Server 12 SP1 From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 1 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP1" VERSION_ID="12.1" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP1" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp1" uname -a: Linux 113-172 3.12.49-11-default #1 SMP Wed Nov 11 20:52:43 UTC 2015 (8d714a0) x86_64 x86_64 x86_64 GNU/Linux run-level 5 Apr 19 19:15 SPEC is set to: /home/SPEC2K6/SPEC2006-V12 Filesystem Type Size Used Avail Use% Mounted on /dev/md126p4 xfs 237G 7.4G 230G 4% /home Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS American Megatrends Inc. 2.0 12/30/2015 Memory: 16x Hynix Semiconductor HMA42GR7AFR4N-UH 16 GB 2 rank 2400 MHz (End of data from sysinfo program)
Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/SPEC2K6/SPEC2006-V12/libs/32:/home/SPEC2K6/SPEC2006-V12/libs/64:/home/SPEC2K6/SPEC2006-V12/sh" Binaries compiled on a system with 1x Intel Core i5-4670K CPU + 32GB memory using RedHat EL 7.1 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec <etc>
icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin |
icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin |
400.perlbench: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 |
401.bzip2: | -D_FILE_OFFSET_BITS=64 |
403.gcc: | -D_FILE_OFFSET_BITS=64 |
429.mcf: | -D_FILE_OFFSET_BITS=64 |
445.gobmk: | -D_FILE_OFFSET_BITS=64 |
456.hmmer: | -D_FILE_OFFSET_BITS=64 |
458.sjeng: | -D_FILE_OFFSET_BITS=64 |
462.libquantum: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX |
464.h264ref: | -D_FILE_OFFSET_BITS=64 |
471.omnetpp: | -D_FILE_OFFSET_BITS=64 |
473.astar: | -D_FILE_OFFSET_BITS=64 |
483.xalancbmk: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX |
-xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 |
-xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh -lsmartheap |
icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin | |
400.perlbench: | icc -m64 |
401.bzip2: | icc -m64 |
456.hmmer: | icc -m64 |
458.sjeng: | icc -m64 |
icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin |
400.perlbench: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 |
401.bzip2: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 |
403.gcc: | -D_FILE_OFFSET_BITS=64 |
429.mcf: | -D_FILE_OFFSET_BITS=64 |
445.gobmk: | -D_FILE_OFFSET_BITS=64 |
456.hmmer: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 |
458.sjeng: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LP64 |
462.libquantum: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX |
464.h264ref: | -D_FILE_OFFSET_BITS=64 |
471.omnetpp: | -D_FILE_OFFSET_BITS=64 |
473.astar: | -D_FILE_OFFSET_BITS=64 |
483.xalancbmk: | -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX |
471.omnetpp: | -xCORE-AVX2(pass 2) -prof-gen:threadsafe(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -par-num-threads=1(pass 1) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/sh -lsmartheap |
473.astar: | basepeak = yes |
483.xalancbmk: | basepeak = yes |
The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.html,
http://www.spec.org/cpu2006/flags/Supermicro-Platform-Settings-V1.2-revH.html.
You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.xml,
http://www.spec.org/cpu2006/flags/Supermicro-Platform-Settings-V1.2-revH.xml.
SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.
For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2016 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Tue May 17 16:51:48 2016 by SPEC CPU2006 HTML formatter v6932.
Originally published on 17 May 2016.